Items where Author is "Goes, J."

Article

Figueiredo, M. and Goes, J. and Oliveira, LB and Steiger-Garção, A. (2011) Low voltage low power fully differential self-biased 1.5-bit quantizer with built-in thresholds. International Journal of Circuit Theory and Applications, n/a-n/a. ISSN 0098-9886. eISSN 1097-007X. URL: http://dx.doi.org/10.1002/cta.750.

Oliveira, J.P. and Goes, J. and Figueiredo, M. and Santin, E. and Fernandes, J. and Ferreira, J. (2010) An 8-bit 120-MS/s Interleaved CMOS Pipeline ADC Based on MOS Parametric Amplification. IEEE Transactions on Circuits and Systems II: Express Briefs, 57 (2), pp. 105-109. ISSN 1549-7747. eISSN 1558-3791. URL: http://dx.doi.org/10.1109/TCSII.2009.2038632.

Galhardo, A. and Goes, J. and Paulino, N. (2009) Design of improved rail-to-rail low-distortion and low-stress switches in advanced CMOS technologies. Analog Integrated Circuits and Signal Processing. ISSN 0925-1030. eISSN 1573-1979. URL: http://dx.doi.org/10.1007/s10470-009-9357-z.

Goes, J. and Pereira, J. and Paulino, N. and Medeiros-Silva, M. (2007) Switched-Capacitor Multiply-By-Two Amplifier Insensitive to Component Mismatches. IEEE Transactions on Circuits and Systems II: Express Briefs, 54 (1), pp. 29-33. ISSN 1549-7747. URL: http://ieeexplore.ieee.org/xpl/RecentIssue.jsp?pun.... (ISI Web of Science, Citations: 4).

Goes, J. and Vital, J.C. and Franca, J.E. (1998) Systematic design for optimization of high-speed self-calibrated pipelined A/D converters. IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing, 45 (12), pp. 1513-1526. ISSN 1057-7130. URL: http://dx.doi.org/10.1109/82.746663.

Book

Paulino, N. and Goes, J. and Steiger-Garção, A. (2008) Low Power Uwb Cmos Radar Sensors. Analog Circuits and Signal Processing . Springer Netherlands, Países Baixos. ISBN 978-1-4020-8409-6. eISBN 978-1-4020-8410-2. URL: http://dx.doi.org/10.1007/978-1-4020-8410-2.

Goes, J. and Vital, J.C. and Franca, J.E. (2003) Systematic Design for Optimisation of Popelined ADCs. The International Series in Engineering and Computer Science, 607 . springer. ISBN 978-0-7923-7291-2. eISBN 978-0-306-48193-2. URL: http://dx.doi.org/10.1007/b100749.

Book Section

Goes, J. (2008) ADC Circuits for Biochemical Applications. In: Iniewski, K., (ed.). VLSI Circuits for Biomedical Applications. Artech House Publishers. ISBN 159693784X. eISBN 9781596937840.

Conference or Workshop Item

Custódio, J and Figueiredo, M and Santin, E and Goes, J. (2010) A CMOS Inverter-Based Self-biased Fully Differential Amplifier. [Paper]. In: Doctoral Conference on Computing, Electrical and Industrial Systems - DoCEIS'10, 22-24 February 2010, Caparica, Lisbon - Portugal. URL: http://dx.doi.org/10.1007/978-3-642-11628-5_60. (ISI Web of Science).

Santin, E. and Figueiredo, M. and Tavares, R. and Goes, J. and Oliveira, L. (2010) Fast-settling low-power two-stage self-biased CMOS amplifier using feedforward-regulated cascode devices. [Paper]. In: 2010 17th IEEE International Conference on Electronics, Circuits and Systems, 12-15 Dec. 2010 , Athens. URL: http://dx.doi.org/10.1109/ICECS.2010.5724445.

Goes, J. and Paulino, N. and Figueiredo, M. and Santin, E. and Rodrigues, M. and Faria, P. and Vaz, B. and Monteiro, R. (2010) Purely-digital versus mixed-signal self-calibration techniques in high-resolution pipeline ADCs. [Paper]. In: NORCHIP 2010, 15-16 Nov. 2010, Tampere. URL: http://dx.doi.org/10.1109/NORCHIP.2010.5669424.

Figueiredo, M. and Santin, E. and Goes, J. and Santos-Tavares, R. and Evans, G. (2010) Two-stage fully-differential inverter-based self-biased CMOS amplifier with high efficiency. [Paper]. In: Proceedings of 2010 IEEE International Symposium on Circuits and Systems, May 30 2010-June 2 2010, Paris. URL: http://dx.doi.org/10.1109/ISCAS.2010.5536985. (ISI Web of Science).

Custodio, J. R. and Oliveira, L. and Goes, J. and Oliveira, J.P. and Bruun, Erik and Andreani, Pietro (2010) A small-area self-biased wideband CMOS balun LNA with noise cancelling and gain enhancement. [Paper]. In: NORCHIP 2010, 15-16 Nov. 2010, Tampere. URL: http://dx.doi.org/10.1109/NORCHIP.2010.5669429.

Figueiredo, M. and Michalak, T. and Goes, J. and Gomes, L. and Sniatala, P. (2009) Improved clock-phase generator based on self-biased CMOS logic for time-interleaved SC circuits. [Paper]. In: Electronics, Circuits, and Systems, 2009. ICECS 2009. 16th IEEE International Conference on.

Paulino, N. and Goes, J. and Steiger-Garcao, A. (2008) A CMOS variable width short-pulse generator circuit for UWB RADAR applications. [Paper]. In: 2008 IEEE International Symposium on Circuits and Systems, 18-21 May 2008, Seatle. URL: http://dx.doi.org/10.1109/ISCAS.2008.4542017. (ISI Web of Science, Citations: 1).

Galhardo, A. and Goes, J. and Paulino, N. (2008) Low-power 6-bit 1-GS/s two-channel pipeline ADC with open-loop amplification using amplifiers with local-feedback. [Paper]. In: 2008 IEEE International Symposium on Circuits and Systems, 18-21 May 2008, Seattle, WA. URL: http://dx.doi.org/10.1109/ISCAS.2008.4541903.

Custodio, J. R. and Paulino, N. and Goes, J. and Bruun, Erik (2008) Multi-bit sigma-delta modulators with enhanced dynamic-range using non-linear DAC for hearing aids. [Paper]. In: 2008 15th IEEE International Conference on Electronics, Circuits and Systems, Aug. 31 2008-Sept. 3 2008, St. Julien's. URL: http://dx.doi.org/10.1109/ICECS.2008.4675051.

Oliveira, J.P. and Goes, J. and Paulino, N. and Fernandes, J. and Paisana, J. (2008) New low-power 1.5-bit time-interleaved MDAC based on MOS capacitor amplification. [Paper]. In: 15th IEEE International Conference on Electronic Circuits and Systems (ICECS'2008), 31 Aug 2008 - 3 Sep 2008, Malta.

Figueiredo, M. and Paulino, N. and Evans, G. and Goes, J. (2008) New simple digital self-calibration technique for pipeline ADCs using the internal thermal noise. [Paper]. In: 2008 IEEE International Symposium on Circuits and Systems, 18-21 May 2008, Seattle, WA. URL: http://dx.doi.org/10.1109/ISCAS.2008.4541397. (ISI Web of Science).

Santos-Tavares, R. and Paulino, N. and Higino, J. and Goes, J. and Oliveira, J. P. (2008) Optimization of multi-stage amplifiers in deep-submicron CMOS using a distributed/parallel genetic algorithm. [Paper]. In: 2008 IEEE International Symposium on Circuits and Systems, 18-21 May 2008, Seattle, WA. URL: http://dx.doi.org/10.1109/ISCAS.2008.4541520.

Esperanca, B. and Goes, J. and Tavares, R. and Galhardo, A. and Paulino, N. and Medeiros Silva, M. (2008) Power-and-area efficient 14-bit 1.5 MSample/s two-stage algorithmic ADC based on a mismatch-insensitive MDAC. [Paper]. In: 2008 IEEE International Symposium on Circuits and Systems, 18-21 May 2008, Seattle, WA. URL: http://dx.doi.org/10.1109/ISCAS.2008.4541394.

Oliveira, J.P. and Goes, J. and Paulino, N. and Fernandes, J. and Paisana, J. (2008) A multiplying-by-two CMOS amplfifier for highspeed ADCs based on parametric amplification. [Paper]. In: 15th International Conference on Mixed Design of Integrated Circuits and Systems, 2008 (MIXDES '08), 19-21 Jun 2008, Poznan - Polónia. (ISI Web of Science).

Paulino, N. and Goes, J. and Steiger-Garcao, A. (2001) Design methodology for optimization of analog building blocks using genetic algorithms. [Paper]. In: ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196), 06 May 2001-09 May 2001, Sydney, NSW. URL: http://dx.doi.org/10.1109/ISCAS.2001.922078.