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Items where Author is "Vaz, Bruno"

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Number of items: 10.

Article

Goes, João and Vaz, Bruno and Paulino, Nuno and Pinto, H. and Monteiro, R. and Steiger-Garção, Adolfo (2005) Low Power Low-Voltage CMOS A/D Sigma-Delta Modulator for Bio-Potential Signals Driven by a Single-Phase Scheme. IEEE Transactions on Circuits and Systems I: Regular Papers, 52 (12), pp. 2595-2604. ISSN 1057-7122.

Conference or Workshop Item

Goes, João and Vaz, Bruno and Monteiro, R. and Paulino, Nuno (2006) A 0.9V SD Modulator with 80dB SNDR and 83dB DR Using a Single-Phase Technique. [Paper]. In: IEEE ISSCC’2006.

Galhardo, A. and Goes, João and Vaz, Bruno and Paulino, Nuno (2005) Design of Low-Voltage Low-Power Pipeline ADCs using a Single-Phas Scheme. [Paper]. In: Fifth IEE International Conference na A/D and D/A Conversion Techniques and Their Applications, Ireland.

Vaz, Bruno and Goes, João and Paulino, Nuno and Steiger-Garção, Adolfo (2005) Design of a 1.8V, 10-bit 130+MS/s Time-Interleaved Non-Scaled Pipeline ADC in 0.18mm CMOS. [Paper]. In: Fifth IEE International Conference on A/D and D/A Conversion Techniques and Their Applications, Irlanda.

Vaz, Bruno and Goes, João and Piloto, R. and Neto, J. and Monteiro, R. and Paulino, Nuno (2005) A Low –Voltage 3 mW 10-bit 4MS/s Pipeline ADC in Digital CMOS for Sensor Interfacing. [Paper]. In: IEEE International Symposium on Circuits and Systems, Kobe, Japan.

Goes, João and Vaz, Bruno and Paulino, Nuno and Pinto, H. and Monteiro, R. and Steiger-Garção, Adolfo (2005) Switched-Capacitor Circuits using a Single-Phase Scheme. [Paper]. In: IEEE International Symposium on Circuits and Systems, Kobe, Japan. (ISI Web of Science).

Goes, João and Vaz, Bruno and Paulino, Nuno and Pinto, H. and Monteiro, R. and Steiger-Garção, Adolfo (2004) Low Power Low-Voltage CMOS A/D Switched-Opamp SD Modulator for Bio-Potential Signals using a Single-Phase Scheme. [Paper]. In: IEEE International Workshop on Biomedical Circuits and Systems, Singapore.

Vaz, Bruno and Goes, João and Paulino, Nuno (2004) A 1.5-V 10-b 50 MS/s Time-Interleaved Switched-Opamp Pipeline CMOS ADC with High Energy Efficiency. [Paper]. In: 2004 Symposium on VLSI Circuits, Honolulu.

Tavares, Rui and Goes, João and Paulino, Nuno and Vaz, Bruno and Steiger-Garção, Adolfo (2003) Design and Optimization of Low-Voltage Two-Stage CMOS Amplifiers with Enhanced Performance. [Paper]. In: IEEE International Symposium on Circuits and Systems, Bangkok, Thailand. (ISI Web of Science).

Vaz, Bruno and Paulino, Nuno and Goes, João and Tavares, Rui and Steiger-Garção, Adolfo (2002) Design of Low-Voltage CMOS Pipelined ADC’s using 1 pico-Joule of Energy per Conversion. [Paper]. In: IEEE International Symposium on Circuits and Systems, Arizona, USA.

This list was generated on Fri May 25 14:02:42 2012 GMT Daylight Time.